Moses - Multicore Systems

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Module / Version:
#40585 / #6

Validity:
Seit WS 2019/20

Default display language:
English

Module title:
Multicore Systems

Credits:
6

Responsible person:
Juurlink, Bernardus

Grading:
benotet

Type of exam:
Portfolioprüfung

Zugehörigkeit

Faculty:
Fakultät IV

Institute:
Institut für Technische Informatik und Mikroelektronik

Area of expertise:
34341400 FG Architektur eingebetteter Systeme

Prüfungsausschuss:
No information

Kontakt

Office:
EN 12

Contact person:
Juurlink, Bernardus

E-mail address:
mca@aes.tu-berlin.de

Website:

http://www.aes.tu-berlin.de

Learning Outcomes

To understand the technology evolution to multicore architectures. To become familiar with different types of multicore architectures such as cache coherent, shared memory architectures, distributed message-passing architectures, and Graphics Processing Units (GPUs). To understand how different multicore architectures are programmed. To be able to select the most suitable multicore architecture for an application domain. To be able to read and understand the principles of shared memory parallel programming.

Content

• Cache coherence protocols and memory consistency models • Synchronization and Transactional memory • Streaming processors, systolic arrays, and dataflow processors • Vector processors • Graphics Processing Units (GPUs) • Thread speculation • Interconnection networks, routing, collective communication operations • Amdahl’s law in the multicore era, scalability analysis • Latency hiding techniques, double buffering • Homogeneous vs. heterogeneous multi-cores, Multiprocessor Systems on Chip (MPSoCs) • Power consumption, voltage/frequency scaling • Reliability, fault tolerance • Virtualization • 3D integration • Real-time issues, dataflow programming models

Module Components

Pflichtteil:

All Courses are mandatory.

Course Name	Type	Number	Cycle	Language	SWS	VZ
Multicore Systems	UE	0433 L 333	SoSe	English	2
Multicore Systems	VL	0433 L 333	SoSe	English	2

Workload and Credit Points

Multicore Systems (UE):

Workload description	Multiplier	Hours	Total
Attendance	15.0	2.0h	30.0h
Pre/post processing	15.0	4.0h	60.0h
			90.0h(~3 LP)

Multicore Systems (VL):

Workload description	Multiplier	Hours	Total
Attendance	15.0	2.0h	30.0h
Pre/post processing	15.0	4.0h	60.0h
			90.0h(~3 LP)

The Workload of the module sums up to 180.0 Hours. Therefore the module contains 6 Credits.

Description of Teaching and Learning Methods

The lectures convey the material in a traditional form. The tutorial is a mixture of assignments and lab hours.

Requirements for participation and examination

Desirable prerequisites for participation in the courses:

An introductory course on computer architecture (e.g. TechGI 2 or Rechnerorganisation), good programming skills, preferably in C/C++.

Mandatory requirements for the module test application:

This module has no requirements.

Module completion

Grading

graded

Type of exam

Portfolio examination

Type of portfolio examination

100 Punkte insgesamt

Language

English

Test elements

Name	Points	Categorie	Duration/Extent
(Deliverable assessment) 5 assignments (weighted 15, 12, 10, 8 and 5 points)	50	practical	jeweils 3 Wochen
(Examination) Final Test	50	written	90 min

Grading scale

Notenschlüssel »Notenschlüssel 2: Fak IV (2)«

Gesamtpunktzahl	1.0	1.3	1.7	2.0	2.3	2.7	3.0	3.3	3.7	4.0
100.0pt	95.0pt	90.0pt	85.0pt	80.0pt	75.0pt	70.0pt	65.0pt	60.0pt	55.0pt	50.0pt

Test description (Module completion)

No information

Duration of the Module

The following number of semesters is estimated for taking and completing the module:
1 Semester.

This module may be commenced in the following semesters:
Sommersemester.

Maximum Number of Participants

The maximum capacity of students is 50.

Registration Procedures

See http://www.aes.tu-berlin.de/

Recommended literature
Chapter 4, Appendix E, F and H of Computer Architecture: A Quantitative Approach; 4th Edition, John L. Hennessy and David A. Patterson, Morgan Kaufmann Publishers

Assigned Degree Programs

Semester:

Zeige auch ausgelaufene Studiengänge und StuPOs

This module is used in the following Degree Programs (new System):

Studiengang / StuPO	StuPOs	Verwendungen	Erste Verwendung	Letzte Verwendung
Computer Engineering (M. Sc.)	1	50	WS 2019/20	SoSe 2024
Computer Science (Informatik) (M. Sc.)	1	50	WS 2019/20	SoSe 2024
Elektrotechnik (M. Sc.)	1	30	WS 2019/20	SoSe 2024
ICT Innovation (M. Sc.)	2	10	WS 2019/20	SoSe 2024
Information Systems Management (Wirtschaftsinformatik) (M. Sc.)	2	28	WS 2019/20	SoSe 2024
Wirtschaftsingenieurwesen (M. Sc.)	1	22	WS 2019/20	SoSe 2024

Master students Computer Engineering (Technische Anwendung), and Electrical Engineering (Spezielle Ergänzungsmodule).

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