Moses - Physical Design of Systems-on-Chip

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Diese Modulbeschreibung gilt nicht im aktuellen Semester.

Die Modulbeschreibung gilt nur für den Zeitraum WS 2019/20 - SoSe 2021.

Module / Version:
#40954 / #3

Validity:
WS 2019/20 - SoSe 2021

Default display language:
English

Module title:
Physical Design of Systems-on-Chip

Credits:
6

Responsible person:
Gerfers, Friedel

Grading:
benotet

Type of exam:
Portfolioprüfung

Zugehörigkeit

Faculty:
Fakultät IV

Institute:
Institut für Technische Informatik und Mikroelektronik

Area of expertise:
34341200 FG Mixed Signal Circuit Design

Prüfungsausschuss:
No information

Kontakt

Office:
EN 4

Contact person:
Gerfers, Friedel

E-mail address:
friedel.gerfers@tu-berlin.de

Website:

https://www.msc.tu-berlin.de/

Learning Outcomes

The students have a deep understanding of the electronics design automation principles. They can navigate modern design and verification flows for physical design of systems-on-chip. In the context of the design process, they are able to identify design challenges and problems and develop appropriate solutions to achieve design closure. The students are furthermore able to evaluate scientific research papers in this area and can derive and pursue own research approaches.

Content

Technological advances enable growth of system-on-chip performance and complexity. In this module, students learn the concepts behind electronic design automation that enable such complex systems-on-chip, and how to create and verify standard-cell based integrated circuit layouts based on abstract HDL descriptions using modern tool flows. The module covers theoretical and practical aspects of the following topics: - hardware design patterns - logic synthesis - floorplanning & placement - clock tree synthesis - routing - timing analysis - power and rail analysis

Module Components

Pflichtgruppe:

All Courses are mandatory.

Course Name	Type	Number	Cycle	Language	SWS	VZ
Physical Design of Systems-on-Chip	SEM	3434 L 10154	WiSe	English	2
Physical Design of Systems-on-Chip	IV	3434 L 10153	WiSe	English	2

Workload and Credit Points

Physical Design of Systems-on-Chip (SEM):

Workload description	Multiplier	Hours	Total
Attendance	15.0	2.0h	30.0h
Written elaboration	1.0	40.0h	40.0h
Preparation of presentation	1.0	20.0h	20.0h
			90.0h(~3 LP)

Physical Design of Systems-on-Chip (IV):

Workload description	Multiplier	Hours	Total
Attendance	15.0	2.0h	30.0h
Pre/post processing	15.0	2.0h	30.0h
Theoretical and practical assignments	6.0	5.0h	30.0h
			90.0h(~3 LP)

The Workload of the module sums up to 180.0 Hours. Therefore the module contains 6 Credits.

Description of Teaching and Learning Methods

This module consists of a integrated event (IV), where theoretical and practical knowledge is presented and examples are discussed. The students complete group assignments that help them in understanding and applying the topics of the integrated event (IV). In the seminar, the students are introduced to current research topics. Each of the students then pick and examine one of the topics in greater depth, write an elaboration and give a presentation about their topic.

Requirements for participation and examination

Desirable prerequisites for participation in the courses:

Knowledge in the following areas is desired: - Digital circuit fundamentals (logic gates, flip-flops) - Hardware description languages such as VHDL or Verilog - Microprocessor systems (CPU, bus, memory, I/O)

Mandatory requirements for the module test application:

This module has no requirements.

Module completion

Grading

graded

Type of exam

Portfolio examination

Type of portfolio examination

100 Punkte insgesamt

Language

German/English

Test elements

Name	Points	Categorie	Duration/Extent
(Deliverable assessment) Theoretical and practical assignments	40	practical	6 assignments
(Deliverable assessment) Seminar presentation	30	oral	~ 20 minutes
(Deliverable assessment) Written seminar elaboration	30	written	4 pages main part

Grading scale

Notenschlüssel »Notenschlüssel 2: Fak IV (2)«

Gesamtpunktzahl	1.0	1.3	1.7	2.0	2.3	2.7	3.0	3.3	3.7	4.0
100.0pt	95.0pt	90.0pt	85.0pt	80.0pt	75.0pt	70.0pt	65.0pt	60.0pt	55.0pt	50.0pt

Test description (Module completion)

The examination consists of assigments, a seminar presentation, and a written elaboration.

Duration of the Module

The following number of semesters is estimated for taking and completing the module:
1 Semester.

This module may be commenced in the following semesters:
Wintersemester.

Maximum Number of Participants

The maximum capacity of students is 15.

Registration Procedures

Registration takes place in the first week seminar and lecture.

Recommended literature
No recommended literature given

Assigned Degree Programs

Semester:

Zeige auch ausgelaufene Studiengänge und StuPOs

This module is used in the following Degree Programs (new System):

	Studiengang / StuPO	StuPOs	Verwendungen	Erste Verwendung	Letzte Verwendung
This module is not used in any degree program.

Miscellaneous

No information

Physical Design of Systems-on-Chip