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Applied Embedded Systems Project

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#40335 / #2

SS 2016 - WS 2016/17

English

Applied Embedded Systems Project

6

Juurlink, Bernardus

benotet

Portfolioprüfung

Zugehörigkeit


Fakultät IV

Institut für Technische Informatik und Mikroelektronik

34341400 FG Architektur eingebetteter Systeme

No information

Kontakt


EN 12

Juurlink, Bernardus

aep@aes.tu-berlin.de

http://www.aes.tu-berlin.de

Learning Outcomes

Knowledge and practical experiences in the realm of designing embedded processor architectures and its programming are gained. Students are able to plan, coordinate and carry out hardware/software co-design, programming in hardware description languages and system-level programming, as well as team management and coordination in a project. The course is principally designed to impart technical skills 35%, method skills 15%, system skills 15%, social skills 35%

Content

In this module, a design and implementation assignment, embedded in a concrete, extensive, and challenging development project is to be solved self-reliantly in team work. This assignment conduces to apply gained methods and knowledge in the realm of computer architecture design and is connected to current research topics of the AES group. The study is to be done under as realistic and work-live compliant conditions as possible, including planning, design, implementation, management, coordination, and presentation of work and results of the concrete team work. Exemplary, the following topics are possible: - Map an embedded single-threaded application to an embedded multi-core platform. - Speed-up an application by using FPGA technology. - Speed-up an embedded system by analyzing and implementing processor and architecture extensions.

Module Components

Pflichtteil:

All Courses are mandatory.

Course NameTypeNumberCycleLanguageSWSVZ
Applied Embedded Systems Project (AEP)PJ0433 L 231SoSeNo information4

Workload and Credit Points

Applied Embedded Systems Project (AEP) (PJ):

Workload descriptionMultiplierHoursTotal
Documentation, Reports, Presentation(s)15.03.0h45.0h
Research, Management, Implementation, Testing15.05.0h75.0h
Weekly contact hours15.04.0h60.0h
180.0h(~6 LP)
The Workload of the module sums up to 180.0 Hours. Therefore the module contains 6 Credits.

Description of Teaching and Learning Methods

Most prominent teaching and learning method for this module is work in groups (Gruppenarbeit); further, short talks (Impulsreferate), feedback (Beobachtung/Feedback) and moderated discussions (moderierte Diskussionen) will be used, oriented towards the requirements and needs of the project and the applying students.

Requirements for participation and examination

Desirable prerequisites for participation in the courses:

Knowledge about computer architecture and hardware description languages (VHDL or Verilog) are obligatory (e.g. Technische Grundlagen der Informatik 2 (TechGI2)). Desirable are practical experiences in synthesis of hardware descriptions or microcontroller or system-level programming.

Mandatory requirements for the module test application:

This module has no requirements.

Module completion

Grading

graded

Type of exam

Portfolio examination

Type of portfolio examination

No information

Language

English

Test elements

NamePoints/WeightCategorieDuration/Extent
(Deliverable assessment) Implementation40No informationNo information
(Deliverable assessment) Project documentation, presentation(s), etc35No informationNo information
(Learning process review) Participation in project work25No informationNo information

Grading scale

No information

Test description (Module completion)

Grading system 2 will be used: 95% or more 1.0 90% or more 1.3 85% or more 1.7 80% or more 2.0 75% or more 2.3 70% or more 2.7 65% or more 3.0 60% or more 3.3 55% or more 3.7 50% or more 4.0 Less than 50% 5.0

Duration of the Module

The following number of semesters is estimated for taking and completing the module:
1 Semester.

This module may be commenced in the following semesters:
Sommersemester.

Maximum Number of Participants

The maximum capacity of students is 15.

Registration Procedures

Pre-registration is organized via ISIS2 system. Registration for the course is carried out on the examination office (possibly electronically QISPOS) within the first six weeks of the semester.

Recommended reading, Lecture notes

Lecture notes

Availability:  unavailable

 

Electronical lecture notes

Availability:  available
Additional information:
http://aes.tu-berlin.de/menue/studium_und_lehre/aep/

 

Literature

Recommended literature
A text book will be used to provide more details for the students.
ISIS2 system will be used to publish all course material.

Assigned Degree Programs


This module is used in the following Degree Programs (new System):

Studiengang / StuPOStuPOsVerwendungenErste VerwendungLetzte Verwendung
This module is not used in any degree program.
- Masterstudiengang Technische Informatik: Studienschwerpunkte: Rechnertechnik, Technische Anwendungen - Masterstudiengang Elektrotechnik: Ergänzungsmodul - Masterstudiengang ICT Innovation Embedded Systems (Pflichtmodul im 1. Semester)

Miscellaneous

No information